Achieving High-Performance, Low-Power Design Optimization With The Solido Library IP Solution

Achieving High-Performance, Low-Power Design Optimization With The Solido Library IP Solution

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Achieving overall power, performance, and area (PPA) targets is a key goal for today’s advanced IC design projects. To accomplish this, standard cell and memory libraries must be optimized for PPA. In this white paper, we describe how the Siemens Solido IP Library Solution helps engineering teams design and verify library IP to optimize PPA tradeoffs, maximize yield, and validate for easy integration into top-level SoC designs.

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Ed Sperling

Ed Sperling

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Ed Sperling is the editor in chief of Semiconductor Engineering.

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